Datasheet

Chapter 20 S12X Debug (S12XDBGV3) Module
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor 765
20.3.2.8.2 Debug Comparator Address High Register (DBGXAH)
Read: Anytime
Write: Anytime when S12XDBG not armed.
20.3.2.8.3 Debug Comparator Address Mid Register (DBGXAM)
Read: Anytime
Write: Anytime when S12XDBG not armed.
Address: 0x0029
76543210
R0
Bit 22 Bit 21 Bit 20 Bit 19 Bit 18 Bit 17 Bit 16
W
Reset 00000000
= Unimplemented or Reserved
Figure 20-15. Debug Comparator Address High Register (DBGXAH)
Table 20-29. DBGXAH Field Descriptions
Field Description
6–0
Bit[22:16]
Comparator Address High Compare Bits — The Comparator address high compare bits control whether the
selected comparator will compare the address bus bits [22:16] to a logic one or logic zero. This register byte is
ignored for XGATE compares.
0 Compare corresponding address bit to a logic zero
1 Compare corresponding address bit to a logic one
Address: 0x002A
76543210
R
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
W
Reset 00000000
Figure 20-16. Debug Comparator Address Mid Register (DBGXAM)
Table 20-30. DBGXAM Field Descriptions
Field Description
7–0
Bit[15:8]
Comparator Address Mid Compare Bits — The Comparator address mid compare bits control whether the
selected comparator will compare the address bus bits [15:8] to a logic one or logic zero.
0 Compare corresponding address bit to a logic zero
1 Compare corresponding address bit to a logic one