Datasheet

Chapter 29 128 Kbyte Flash Module (S12XFTX128K1V1)
MC9S12XDP512 Data Sheet, Rev. 2.21
1216 Freescale Semiconductor
Figure 29-24. Example Data Compress Command Flow
Write: Flash Address to start
Write: FCMD register
Data Compress Command 0x06
Write: FSTAT register
Clear CBEIF 0x80
1.
2.
3.
Clear ACCERR/PVIOL 0x30
Write: FSTAT register
yes
no
Access Error and
Protection Violation
no
compression and number of word
Bit Polling for
Command Completion
Check
Read: FSTAT register
yes
Read: FSTAT register
no
START
yes
Check
CBEIF
Set?
Address, Data,
Command
Buffer Empty Check
CCIF
Set?
ACCERR/
PVIOL
Set?
EXIT
Erase and Reprogram
Write: FCLKDIV register
Read: FCLKDIV register
yes
no
Clock Register
Written
Check
FDIVLD
Set?
NOTE: FCLKDIV needs to
be set once after each reset.
Flash Sector(s) Compressed
Data Compress Signature
Read: FDATA registers
no
yes
Signature
Valid?
addresses to compress