Datasheet

Chapter 2 Port Integration Module (S12XEPIMV1)
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor 129
2.3.35 Port S Wired-Or Mode Register (WOMS)
2.3.36 PIM Reserved Register
Address 0x024E Access: User read/write
(1)
1. Read: Anytime.
Write: Anytime.
76543210
R
WOMS7 WOMS6 WOMS5 WOMS4 WOMS3 WOMS2 WOMS1 WOMS0
W
Reset 00000000
Figure 2-33. Port S Wired-Or Mode Register (WOMS)
Table 2-32. WOMS Register Field Descriptions
Field Description
7-0
WOMS
Port S wired-or mode—Enable wired-or functionality
This register configures the output pins as wired-or independent of the function used on the pins. If enabled the
output is driven active low only (open-drain). A logic level of “1” is not driven.This allows a multipoint connection of
several serial modules. These bits have no influence on pins used as inputs.
1 Output buffers operate as open-drain outputs.
0 Output buffers operate as push-pull outputs.
Address 0x024F Access: User read
(1)
1. Read: Always reads 0x00
Write: Unimplemented
76543210
R00000000
W
Reset 00000000
= Unimplemented or Reserved u = Unaffected by reset
Figure 2-34. PIM Reserved Register