Datasheet
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor 1077
Chapter 28
768 KByte Flash Module (S12XFTM768K4V2)
28.1 Introduction
The FTM768K4 module implements the following:
• 768 Kbytes of P-Flash (Program Flash) memory, consisting of 4 physical Flash blocks, intended
primarily for nonvolatile code storage
Table 28-1. Revision History
Revision
Number
Revision
Date
Sections
Affected
Description of Changes
V02.09 29 Nov 2007 - Cleanup
V02.10 19 Dec 2007 28.4.2/28-1113
28.4.2/28-1113
28.3.1/28-1082
- Updated Command Error Handling tables based on parent-child relationship
with FTM1024K5
- Corrected Error Handling table for Full Partition D-Flash, Partition D-Flash,
and EEPROM Emulation Query commands
- Corrected P-Flash Memory Addressing table
V02.11 25 Sep 2009 28.1/28-1077
28.3.2.1/28-
1089
28.4.2.4/28-
1116
28.4.2.7/28-
1119
28.4.2.12/28-
1123
28.4.2.12/28-
1123
28.4.2.12/28-
1123
28.4.2.20/28-
1132
28.3.2/28-1087
28.3.2.1/28-
1089
28.4.1.2/28-
1108
28.6/28-1138
- Clarify single bit fault correction for P-Flash phrase
- Expand FDIV vs OSCCLK Frequency table
- Add statement concerning code runaway when executing Read Once
command from Flash block containing associated fields
- Add statement concerning code runaway when executing Program Once
command from Flash block containing associated fields
- Add statement concerning code runaway when executing Verify Backdoor
Access Key command from Flash block containing associated fields
- Relate Key 0 to associated Backdoor Comparison Key address
- Change “power down reset” to “reset”
- Add ACCERR condition for Disable EEPROM Emulation command
The following changes were made to clarify module behavior related to Flash
register access during reset sequence and while Flash commands are active:
- Add caution concerning register writes while command is active
- Writes to FCLKDIV are allowed during reset sequence while CCIF is clear
- Add caution concerning register writes while command is active
- Writes to FCCOBIX, FCCOBHI, FCCOBLO registers are ignored during
reset sequence