Datasheet

Chapter 2 Port Integration Module (S12XEPIMV1)
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor 123
NOTE
Due to internal synchronization circuits, it can take up to 2 bus clock cycles
until the correct value is read on PTT or PTIT registers, when changing the
DDRT register.
2.3.24 Port T Reduced Drive Register (RDRT)
2.3.25 Port T Pull Device Enable Register (PERT)
Address 0x0243 Access: User read/write
(1)
1. Read: Anytime.
Write: Anytime.
76543210
R
RDRT7 RDRT6 RDRT5 RDRT4 RDRT3 RDRT2 RDRT1 RDRT0
W
Reset 00000000
Figure 2-22. Port T Reduced Drive Register (RDRT)
Table 2-23. RDRT Register Field Descriptions
Field Description
7-0
RDRT
Port T reduced drive—Select reduced drive for outputs
This register configures the drive strength of output pins 7 through 0 as either full or reduced independent of the
function used on the pins. If a pin is used as input this bit has no effect.
1 Reduced drive selected (approx. 1/5 of the full drive strength).
0 Full drive strength enabled.
Address 0x0244 Access: User read/write
(1)
1. Read: Anytime.
Write: Anytime.
76543210
R
PERT7 PERT6 PERT5 PERT4 PERT3 PERT2 PERT1 PERT0
W
Reset 00000000
Figure 2-23. Port T Pull Device Enable Register (PERT)
Table 2-24. PERT Register Field Descriptions
Field Description
7-0
PERT
Port T pull device enable—Enable pull devices on input pins
These bits configure whether a pull device is activated, if the associated pin is used as an input. This bit has no effect
if the pin is used as an output. Out of reset no pull device is enabled.
1 Pull device enabled.
0 Pull device disabled.