Datasheet

Chapter 2 Port Integration Module (S12XEPIMV1)
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor 137
2.3.45 Port P Data Register (PTP)
Address 0x0258 Access: User read/write
(1)
1. Read: Anytime.
Write: Anytime.
76543210
R
PTP7 PTP6 PTP5 PTP4 PTP3 PTP2 PTP1 PTP0
W
Altern.
Function
PWM7 PWM6 PWM5 PWM4 PWM3 PWM2 PWM1 PWM0
SCK2 SS2 MOSI2 MISO2 SS1 SCK1 MOSI1 MISO1
Reset 00000000
Figure 2-43. Port P Data Register (PTP)
Table 2-41. PTP Register Field Descriptions
Field Description
7
PTP
Port P general purpose input/output data—Data Register
Port P pin 6 is associated with the PWM output channel 7 and the SCK signal of SPI2.
The PWM function takes precedence over the SPI2 and the general purpose I/O function if the PWM channel 7 is
enabled. The SPI2 function takes precedence of the general purpose I/O function if the routed SPI2 is enabled.
When not used with the alternative functions, these pins can be used as general purpose I/O.
If the associated data direction bits of these pins are set to 1, a read returns the value of the port register, otherwise
the buffered pin input state is read.
6
PTP
Port P general purpose input/output data—Data Register
Port P pin 6 is associated with the PWM output channel 6 and the
SS signal of SPI2.
The PWM function takes precedence over the SPI2 and the general purpose I/O function if the PWM channel 6 is
enabled. The SPI2 function takes precedence of the general purpose I/O function if the routed SPI2 is enabled.
When not used with the alternative functions, these pins can be used as general purpose I/O.
If the associated data direction bits of these pins are set to 1, a read returns the value of the port register, otherwise
the buffered pin input state is read.
5
PTP
Port P general purpose input/output data—Data Register
Port P pin 5 is associated with the PWM output channel 5 and the MOSI signal of SPI2.
The PWM function takes precedence over the SPI2 and the general purpose I/O function if the PWM channel 5 is
enabled. The SPI2 function takes precedence of the general purpose I/O function if the routed SPI2 is enabled.
When not used with the alternative functions, these pins can be used as general purpose I/O.
If the associated data direction bits of these pins are set to 1, a read returns the value of the port register, otherwise
the buffered pin input state is read.
4
PTP
Port P general purpose input/output data—Data Register
Port P pin 4 is associated with the PWM output channel 4 and the MISO signal of SPI2.
The PWM function takes precedence over the SPI2 and the general purpose I/O function if the PWM channel 4 is
enabled. The SPI2 function takes precedence of the general purpose I/O function if the routed SPI2 is enabled.
When not used with the alternative functions, these pins can be used as general purpose I/O.
If the associated data direction bits of these pins are set to 1, a read returns the value of the port register, otherwise
the buffered pin input state is read.