Datasheet

Chapter 2 Port Integration Module (S12XEPIMV1)
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor 141
2.3.50 Port P Polarity Select Register (PPSP)
2.3.51 Port P Interrupt Enable Register (PIEP)
Read: Anytime.
Address 0x025D Access: User read/write
(1)
1. Read: Anytime.
Write: Anytime.
76543210
R
PPSP7 PPSP6 PPSP5 PPSP4 PPSP3 PPSP2 PPSP1 PPSP0
W
Reset 00000000
Figure 2-48. Port P Polarity Select Register (PPSP)
Table 2-46. PPSP Register Field Descriptions
Field Description
7-0
PPSP
Port P pull device select—Determine pull device polarity on input pins
This register serves a dual purpose by selecting the polarity of the active interrupt edge as well as selecting a pull-
up or pull-down device if enabled.
1 A rising edge on the associated Port P pin sets the associated flag bit in the PIFP register. A pull-down device is
connected to the associated Port P pin, if enabled by the associated bit in register PERP and if the port is used
as input.
0 A falling edge on the associated Port P pin sets the associated flag bit in the PIFP register.A pull-up device is
connected to the associated Port P pin, if enabled by the associated bit in register PERP and if the port is used
as input.
Address 0x025E Access: User read/write
(1)
1. Read: Anytime.
Write: Anytime.
76543210
R
PIEP7 PIEP6 PIEP5 PIEP4 PIEP3 PIEP2 PIEP1 PIEP0
W
Reset 00000000
Figure 2-49. Port P Interrupt Enable Register (PIEP)
Table 2-47. PPSP Register Field Descriptions
Field Description
7-0
PIEP
Port P interrupt enable—
This register disables or enables on a per-pin basis the edge sensitive external interrupt associated with Port P.
1 Interrupt is enabled.
0 Interrupt is disabled (interrupt flag masked).