Datasheet

Chapter 2 Port Integration Module (S12XEPIMV1)
MC9S12XE-Family Reference Manual Rev. 1.25
158 Freescale Semiconductor
2.3.74 Port AD0 Reduced Drive Register 1 (RDR1AD0)
2.3.75 Port AD0 Pull Up Enable Register 0 (PER0AD0)
Address 0x0275 Access: User read/write
(1)
1. Read: Anytime.
Write: Anytime.
76543210
R
RDR1AD07 RDR1AD06 RDR1AD05 RDR1AD04 RDR1AD03 RDR1AD02 RDR1AD01 RDR1AD00
W
Reset 00000000
Figure 2-72. Port AD0 Reduced Drive Register 1 (RDR1AD0)
Table 2-70. RDR1AD0 Register Field Descriptions
Field Description
7-0
RDR1AD0
Port AD0 reduced drive—Select reduced drive for Port AD0 outputs
This register configures the drive strength of Port AD0 output pins 7 through 0 as either full or reduced independent
of the function used on the pins. If a pin is used as input this bit has no effect.
1 Reduced drive selected (approx. 1/5 of the full drive strength).
0 Full drive strength enabled.
Address 0x0276 Access: User read/write
(1)
1. Read: Anytime.
Write: Anytime.
76543210
R
PER0AD07 PER0AD06 PER0AD05 PER0AD04 PER0AD03 PER0AD02 PER0AD01 PER0AD00
W
Reset 00000000
Figure 2-73. Port AD0 Pull Device Up Register 0 (PER0AD0)
Table 2-71. PER0AD0 Register Field Descriptions
Field Description
7-0
PER0AD0
Port AD0 pull device enable—Enable pull devices on input pins
These bits configure whether a pull device is activated, if the associated pin is used as an input. This bit has no effect
if the pin is used as an output. Out of reset no pull device is enabled.
1 Pull device enabled.
0 Pull device disabled.