Datasheet

Chapter 2 Port Integration Module (S12XEPIMV1)

MC9S12XE-Family Reference Manual Rev. 1.25

178 Freescale Semiconductor

This register configures the re-routing of SCI3, IIC0, CS[3:0] on alternative ports.

2.4 Functional Description

2.4.1 General

Each pin except PE0, PE1, and BKGD can act as general purpose I/O. In addition each pin can act as an

output from the external bus interface module or a peripheral module or an input to the external bus

interface module or a peripheral module.

2.4.2 Registers

A set of conﬁguration registers is common to all ports with exceptions in the expanded bus interface and

ATD ports (Table 2-103). All registers can be written at any time, however a speciﬁc conﬁguration might

not become active.

Example 2-1. Selecting a pull-up device

This device does not become active while the port is used as a push-pull output.

Table 2-102. Port F Routing Summary

Module PTFRR Related Pins

543210

TXD RXD

SCI3 0 x x x x x PM7 PM6

1 x x x x x PF7 PF6

SCL SDA

IIC0 x 0 x x x x PJ7 PJ6

x 1 x x x x PF5 PF4

CS3 x x 0 x x x PJ0

xx1xxx PF3

CS2 x x x 0 x x PJ5

xxx1xx PF2

CS1 x x x x 0 x PJ2

xxxx1x PF1

CS0 x x x x x 0 PJ4

xxxxx1 PF0