Datasheet

Chapter 7 Background Debug Module (S12XBDMV2)
MC9S12XE-Family Reference Manual Rev. 1.25
282 Freescale Semiconductor
7.3 Memory Map and Register Definition
7.3.1 Module Memory Map
Table 7-2 shows the BDM memory map when BDM is active.
7.3.2 Register Descriptions
A summary of the registers associated with the BDM is shown in Figure 7-2. Registers are accessed by
host-driven communications to the BDM hardware using READ_BD and WRITE_BD commands.
Table 7-2. BDM Memory Map
Global Address Module
Size
(Bytes)
0x7FFF00–0x7FFF0B BDM registers 12
0x7FFF0C–0x7FFF0E BDM firmware ROM 3
0x7FFF0F Family ID (part of BDM firmware ROM) 1
0x7FFF10–0x7FFFFF BDM firmware ROM 240
Global
Address
Register
Name
Bit 7 6 5 4 3 2 1 Bit 0
0x7FFF00 Reserved R X X X X X X 0 0
W
0x7FFF01 BDMSTS R
ENBDM
BDMACT 0 SDV TRACE
CLKSW
UNSEC 0
W
0x7FFF02 Reserved R X X X X X X X X
W
0x7FFF03 Reserved R X X X X X X X X
W
0x7FFF04 Reserved R X X X X X X X X
W
0x7FFF05 Reserved R X X X X X X X X
W
0x7FFF06 BDMCCRL R
CCR7 CCR6 CCR5 CCR4 CCR3 CCR2 CCR1 CCR0
W
= Unimplemented, Reserved = Implemented (do not alter)
X
= Indeterminate
0
= Always read zero
Figure 7-2. BDM Register Summary