Datasheet

Chapter 10 XGATE (S12XGATEV3)

MC9S12XE-Family Reference Manual Rev. 1.25

410 Freescale Semiconductor

Operation

RD.L & IMM8 ⇒ NONE

Performs a bit wise logical AND between the low byte of register RD and an immediate 8 bit constant.

Only the condition code ﬂags get updated, but no result is written back.

CCR Effects

Code and CPU Cycles

BITL

Bit Test Immediate 8 bit Constant

(Low Byte)

BITL

NZVC

∆∆0—

N: Set if bit 7 of the result is set; cleared otherwise.

Z: Set if the 8 bit result is $00; cleared otherwise.

V: 0; cleared.

C: Not affected.

Source Form

Address

Mode

Machine Code Cycles

BITL RD, #IMM8 IMM8 1 0 0 1 0 RD IMM8 P