Datasheet

Chapter 14 Enhanced Capture Timer (ECT16B8CV3)
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor 535
14.3.2.1 Timer Input Capture/Output Compare Select Register (TIOS)
Read or write: Anytime
All bits reset to zero.
0x003A
TC1H (High)
R TC15 TC14 TC13 TC12 TC11 TC10 TC9 TC8
W
0x003B
TC1H (Low)
R TC7 TC6 TC5 TC4 TC3 TC2 TC1 TC0
W
0x003C
TC2H (High)
R TC15 TC14 TC13 TC12 TC11 TC10 TC9 TC8
W
0x003D
TC2H (Low)
R TC7 TC6 TC5 TC4 TC3 TC2 TC1 TC0
W
0x003E
TC3H (High)
R TC15 TC14 TC13 TC12 TC11 TC10 TC9 TC8
W
0x003F
TC3H (Low)
R TC7 TC6 TC5 TC4 TC3 TC2 TC1 TC0
W
Module Base + 0x0000
76543210
R
IOS7 IOS6 IOS5 IOS4 IOS3 IOS2 IOS1 IOS0
W
Reset 00000000
Figure 14-3. Timer Input Capture/Output Compare Register (TIOS)
Table 14-2. TIOS Field Descriptions
Field Description
7:0
IOS[7:0]
Input Capture or Output Compare Channel Configuration
0 The corresponding channel acts as an input capture.
1 The corresponding channel acts as an output compare.
Register
Name
Bit 7 654321Bit 0
= Unimplemented or Reserved
Figure 14-2. ECT Register Summary (Sheet 5 of 5)