Datasheet

Chapter 15 Inter-Integrated Circuit (IICV3) Block Description
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor 581
15.3 Memory Map and Register Definition
This section provides a detailed description of all memory and registers for the IIC module.
15.3.1 Register Descriptions
This section consists of register descriptions in address order. Each description includes a standard register
diagram with an associated figure number. Details of register bit and field function follow the register
diagrams, in bit order.
15.3.1.1 IIC Address Register (IBAD)
Read and write anytime
Register
Name
Bit 7 654321Bit 0
0x0000
IBAD
R
ADR7 ADR6 ADR5 ADR4 ADR3 ADR2 ADR1
0
W
0x0001
IBFD
R
IBC7 IBC6 IBC5 IBC4 IBC3 IBC2 IBC1 IBC0
W
0x0002
IBCR
R
IBEN IBIE MS/
SL Tx/Rx TXAK
00
IBSWAI
W
RSTA
0x0003
IBSR
R TCF IAAS IBB
IBAL
0SRW
IBIF
RXAK
W
0x0004
IBDR
R
D7 D6 D5 D4 D3 D2 D1 D0
W
0x0005
IBCR2
R
GCEN ADTYPE
000
ADR10 ADR9 ADR8
W
= Unimplemented or Reserved
Figure 15-2. IIC Register Summary
Module Base +0x0000
76543210
R
ADR7 ADR6 ADR5 ADR4 ADR3 ADR2 ADR1
0
W
Reset 0 0 0 00000
= Unimplemented or Reserved
Figure 15-3. IIC Bus Address Register (IBAD)