Datasheet

Chapter 16 Freescale’s Scalable Controller Area Network (S12MSCANV3)
MC9S12XE-Family Reference Manual Rev. 1.25
606 Freescale Semiconductor
16.1.1 Glossary
16.1.2 Block Diagram
Figure 16-1. MSCAN Block Diagram
Table 16-2. Terminology
ACK Acknowledge of CAN message
CAN Controller Area Network
CRC Cyclic Redundancy Code
EOF End of Frame
FIFO First-In-First-Out Memory
IFS Inter-Frame Sequence
SOF Start of Frame
CPU bus CPU related read/write data bus
CAN bus CAN protocol related serial bus
oscillator clock Direct clock from external oscillator
bus clock CPU bus related clock
CAN clock CAN protocol related clock
RXCAN
TXCAN
Receive/
Transmit
Engine
Message
Filtering
and
Buffering
Control
and
Status
Wake-Up Interrupt Req.
Errors Interrupt Req.
Receive Interrupt Req.
Transmit Interrupt Req.
CANCLK
Bus Clock
Configuration
Oscillator Clock
MUX Presc.
Tq Clk
MSCAN
Low Pass Filter
Wake-Up
Registers