Datasheet

Chapter 1 Device Overview MC9S12XE-Family
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor 61
PP4 KWP4 PWM4 MISO2 TIMIOC4 V
DDX
PERP/
PPSP
Disabled Port P I/O, interrupt, channel
4 of PWM/TIM, MISO2 of
SPI2
PP3 KWP3 PWM3
SS1 TIMIOC3 V
DDX
PERP/
PPSP
Disabled Port P I/O, interrupt, channel
3 of PWM/TIM,
SS of SPI1
PP2 KWP2 PWM2 SCK1 TIMIOC2 V
DDX
PERP/
PPSP
Disabled Port P I/O, interrupt, channel
2 of PWM/TIM, SCK of SPI1
PP1 KWP1 PWM1 MOSI1 TIMIOC1 V
DDX
PERP/
PPSP
Disabled Port P I/O, interrupt, channel
1 of PWM/TIM, MOSI of
SPI1
PP0 KWP0 PWM0 MISO1 TIMIOC0 V
DDX
PERP/
PPSP
Disabled Port P I/O, interrupt, channel
0 of PWM/TIM, MISO2 of
SPI1
PR[7:0] TIMIOC
[7:0]
———V
DDX
PERR/
PPSR
Disabled Port RI/O, TIM channels
PS7
SS0 V
DDX
PERS/
PPSS
Up Port S I/O, SS of SPI0
PS6 SCK0 V
DDX
PERS/
PPSS
Up Port S I/O, SCK of SPI0
PS5 MOSI0 V
DDX
PERS/
PPSS
Up Port S I/O, MOSI of SPI0
PS4 MISO0 V
DDX
PERS/
PPSS
Up Port S I/O, MISO of SPI0
PS3 TXD1 V
DDX
PERS/
PPSS
Up Port S I/O, TXD of SCI1
PS2 RXD1 V
DDX
PERS/
PPSS
Up Port S I/O, RXD of SCI1
PS1 TXD0 V
DDX
PERS/
PPSS
Up Port S I/O, TXD of SCI0
PS0 RXD0 V
DDX
PERS/
PPSS
Up Port S I/O, RXD of SCI0
PT[7:6] IOC[7:6] V
DDX
PERT/
PPST
Disabled Port T I/O, ECT channels
PT[5] IOC[5] VREGAPI V
DDX
PERT/
PPST
Disabled Port T I/O, ECT channels
PT[4:0] IOC[4:0] V
DDX
PERT/
PPST
Disabled Port T I/O, ECT channels
Table 1-10. Signal Properties Summary (Sheet 4 of 4)
Pin
Name
Function 1
Pin
Name
Function 2
Pin
Name
Function 3
Pin
Name
Function 4
Pin
Name
Function 5
Power
Supply
Internal Pull
Resistor
Description
CTRL
Reset
State