Datasheet

Chapter 24 128 KByte Flash Module (S12XFTM128K2V1)
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor 869
24.4.2.3 Erase Verify P-Flash Section Command
The Erase Verify P-Flash Section command will verify that a section of code in the P-Flash memory is
erased. The Erase Verify P-Flash Section command defines the starting point of the code to be verified and
the number of phrases.128
Upon clearing CCIF to launch the Erase Verify P-Flash Section command, the Memory Controller will
verify the selected section of Flash memory is erased. The CCIF flag will set after the Erase Verify P-Flash
Section operation has completed.
Table 24-36. Erase Verify Block Command Error Handling
Register Error Bit Error Condition
FSTAT
ACCERR
Set if CCOBIX[2:0] != 000 at command launch
Set if an invalid global address [22:16] is supplied
(1)
1. As defined by the memory map for FTM256K2.
FPVIOL None
MGSTAT1 Set if any errors have been encountered during the read
(2)
2. As found in the memory map for FTM256K2.
MGSTAT0 Set if any non-correctable errors have been encountered during the read
2
FERSTAT EPVIOLIF None
Table 24-37. Erase Verify P-Flash Section Command FCCOB Requirements
CCOBIX[2:0] FCCOB Parameters
000 0x03
Global address [22:16] of
a P-Flash block
001 Global address [15:0] of the first phrase to be verified
010 Number of phrases to be verified
Table 24-38. Erase Verify P-Flash Section Command Error Handling
Register Error Bit Error Condition
FSTAT
ACCERR
Set if CCOBIX[2:0] != 010 at command launch
Set if command not available in current mode (see Table 24-30)
Set if an invalid global address [22:0] is supplied
(1)
Set if a misaligned phrase address is supplied (global address [2:0] != 000)
Set if the requested section crosses a 128 Kbyte boundary
FPVIOL None
MGSTAT1 Set if any errors have been encountered during the read
(2)
MGSTAT0 Set if any non-correctable errors have been encountered during the read
2
FERSTAT EPVIOLIF None