Datasheet

Appendix A Electrical Characteristics
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor 1233
The number of program/erase cycles for the EEPROM/D-Flash depends upon the partitioning of D-Flash
used for EEPROM Emulation. Defining RAM size allocated for EEE as EEE-RAM and D-Flash partition
allocated to EEE as EEE_NVM, the minimum number of program/erase cycles is specified depending
upon the ratio of EEE_NVM/EEE_RAM. The minimum ratio EEE_NVM/EEE_RAM =8.
Figure A-2. Program/Erase Dependency on D-Flash Partitioning
5. This represents the number of writes of updated data words to the EEE_RAM partition. Typical endurance performance for
the Emulated EEPROM array is based on typical endurance performance and the EEE algorithm implemented on this
product family. Spec. table quotes typical endurance evaluated at 25°C for this product family.
6. This is equivalent to using a single byte or aligned word in the EEE_RAM with 32K D-Flash allocated for EEEPROM
EEE_NVM/EEE_RAM ratio
10
# K Cycles
100
1,000
100,000
1,000,000
10 100 1000 100,000
20% Spec Cycles
10 Year Data Retention
10,000
10,000
Spec Cycles
5 Year Data Retention
(Log)
(Log)