Datasheet

Appendix A Electrical Characteristics
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor 1243
In Figure A-8 the timing diagram for master mode with transmission format CPHA=1 is depicted.
Figure A-8. SPI Master Timing (CPHA = 1)
SCK
(Output)
SCK
(Output)
MISO
(Input)
MOSI
(Output)
1
5 6
MSB IN2
Bit MSB-1. . . 1
LSB IN
Master MSB OUT2
Master LSB OUT
Bit MSB-1. . . 1
4
4
9
12 13
11
Port Data
(CPOL = 0)
(CPOL = 1)
Port Data
SS1
(Output)
2
12 13 3
1.If configured as output
2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1,bit 2... MSB.