Datasheet

Chapter 2 Port Integration Module (S12XEPIMV1)
MC9S12XE-Family Reference Manual Rev. 1.25
150 Freescale Semiconductor
2.3.62 Port J Input Register (PTIJ)
2.3.63 Port J Data Direction Register (DDRJ)
1
PTJ
Port J general purpose input/output data—Data Register
This pin is associated with the TXD signal of SCI2.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
0
PTJ
Port J general purpose input/output data—Data Register
This pin is associated with the TXD signal of SCI2 and chip select output
CS3. The SCI function takes precedence
over the chip select and general purpose I/O function if the SCI2 is enabled. The chip select takes precedence over
the general purpose I/O.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Address 0x0269 Access: User read
(1)
1. Read: Anytime.
Write:Never, writes to this register have no effect.
76543210
R PTIJ7 PTIJ6 PTIJ5 PTIJ4 PTIJ3 PTIJ2 PTIJ1 PTIJ0
W
Reset uuuuuuuu
= Unimplemented or Reserved u = Unaffected by reset
Figure 2-60. Port J Input Register (PTIJ)
Table 2-58. PTIJ Register Field Descriptions
Field Description
7-0
PTIJ
Port J input data—
This register always reads back the buffered state of the associated pins. This can also be used to detect overload
or short circuit conditions on output pins.
Address 0x026A Access: User read/write
(1)
76543210
R
DDRJ7 DDRJ6 DDRJ5 DDRJ4 DDRJ3 DDRJ2 DDRJ1 DDRJ0
W
Reset 00000000
Figure 2-61. Port J Data Direction Register (DDRJ)
Table 2-57. PTJ Register Field Descriptions (continued)
Field Description