Datasheet

Chapter 2 Port Integration Module (S12XEPIMV1)
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor 159
2.3.76 Port AD0 Pull Up Enable Register 1 (PER1AD0)
2.3.77 Port AD1 Data Register 0 (PT0AD1)
Address 0x0277 Access: User read/write
(1)
1. Read: Anytime.
Write: Anytime.
76543210
R
PER1AD07 PER1AD06 PER1AD05 PER1AD04 PER1AD03 PER1AD02 PER1AD01 PER1AD00
W
Reset 00000000
Figure 2-74. Port AD0 Pull Up Enable Register 1 (PER1AD0)
Table 2-72. PER1AD0 Register Field Descriptions
Field Description
7-0
PER1AD0
Port AD0 pull device enable—Enable pull devices on input pins
These bits configure whether a pull device is activated, if the associated pin is used as an input. This bit has no effect
if the pin is used as an output. Out of reset no pull device is enabled.
1 Pull device enabled.
0 Pull device disabled.
Address 0x0278 Access: User read/write
(1)
1. Read: Anytime.
Write: Anytime.
76543210
R
PT0AD17 PT0AD16 PT0AD15 PT0AD14 PT0AD13 PT0AD12 PT0AD11 PT0AD10
W
Altern.
Function
AN15 AN14 AN13 AN12 AN11 AN10 AN9 AN8
Reset 00000000
Figure 2-75. Port AD1 Data Register 0 (PT0AD1)
Table 2-73. PT0AD1 Register Field Descriptions
Field Description
7-0
PT0AD1
Port AD1 general purpose input/output data—Data Register
This register is associated with ATD1 analog inputs AN[15:8] on PAD[31:24], respectively.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bits of these pins are set to 1, a read returns the value of the port register, otherwise
the buffered pin input state is read.