Datasheet

Chapter 2 Port Integration Module (S12XEPIMV1)
MC9S12XE-Family Reference Manual Rev. 1.25
162 Freescale Semiconductor
2.3.81 Port AD1 Reduced Drive Register 0 (RDR0AD1)
2.3.82 Port AD1 Reduced Drive Register 1 (RDR1AD1)
Address 0x027C Access: User read/write
(1)
1. Read: Anytime.
Write: Anytime.
76543210
R
RDR0AD17 RDR0AD16 RDR0AD15 RDR0AD14 RDR0AD13 RDR0AD12 RDR0AD11 RDR0AD10
W
Reset 00000000
Figure 2-79. Port AD1 Reduced Drive Register 0 (RDR0AD1)
Table 2-77. RDR0AD1 Register Field Descriptions
Field Description
7-0
RDR0AD1
Port AD1 reduced drive—Select reduced drive for Port AD1 outputs
This register configures the drive strength of Port AD1 output pins 15 through 8 as either full or reduced independent
of the function used on the pins. If a pin is used as input this bit has no effect.
1 Reduced drive selected (approx. 1/5 of the full drive strength).
0 Full drive strength enabled.
Address 0x027D Access: User read/write
(1)
1. Read: Anytime.
Write: Anytime.
76543210
R
RDR1AD17 RDR1AD16 RDR1AD15 RDR1AD14 RDR1AD13 RDR1AD12 RDR1AD11 RDR1AD10
W
Reset 00000000
Figure 2-80. Port AD1 Reduced Drive Register 1 (RDR1AD1)
Table 2-78. RDR1AD1 Register Field Descriptions
Field Description
7-0
RDR1AD1
Port AD1 reduced drive—Select reduced drive for Port AD1 outputs
This register configures the drive strength of Port AD1 output pins 7 through 0 as either full or reduced independent
of the function used on the pins. If a pin is used as input this bit has no effect.
1 Reduced drive selected (approx. 1/5 of the full drive strength).
0 Full drive strength enabled.