Datasheet
Chapter 2 Port Integration Module (S12XEPIMV1)
MC9S12XE-Family Reference Manual Rev. 1.25
164 Freescale Semiconductor
2.3.85 Port R Data Register (PTR)
2.3.86 Port R Input Register (PTIR)
Address 0x0368 Access: User read/write
(1)
1. Read: Anytime.
Write: Anytime.
76543210
R
PTR7 PTR6 PTR5 PTR4 PTR3 PTR2 PTR1 PTR0
W
Altern.
Function
TIMIOC7 TIMIOC6 TIMIOC5 TIMIOC4 TIMIOC3 TIMIOC2 TIMIOC1 TIMIOC0
Reset 00000000
Figure 2-83. Port R Data Register (PTR)
Table 2-81. PTR Register Field Descriptions
Field Description
7-0
PTR
Port R general purpose input/output data—Data Register
Port R pins 7 through 0 are associated with TIM channels TIMIOC7 through TIMIOC0.
When not used with the alternative function, these pins can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Address 0x0369 Access: User read
(1)
1. Read: Anytime.
Write:Never, writes to this register have no effect.
76543210
R PTIR7 PTIR6 PTIR5 PTIR4 PTIR3 PTIR2 PTIR1 PTIR0
W
Reset uuuuuuuu
= Unimplemented or Reserved u = Unaffected by reset
Figure 2-84. Port R Input Register (PTIR)
Table 2-82. PTIR Register Field Descriptions
Field Description
7-0
PTIR
Port R input data—
This register always reads back the buffered state of the associated pins. This can also be used to detect overload
or short circuit conditions on output pins.
