Datasheet

Chapter 3 Memory Mapping Control (S12XMMCV4)
MC9S12XE-Family Reference Manual Rev. 1.25
216 Freescale Semiconductor
3.4.2.5.1 System XSRAM
System XSRAM has two ways to be accessed by the CPU. One is by the programming of RPAGE and the
fixed XSRAM areas configured by the values of ROMHM, RAMHM, or by the usage of the global
instruction and the usage of GPAGE.
Figure 3-22 shows the memory map for the implemented XSRAM. The size of the implemented XSRAM
is done by the device definition and denoted by RAMSIZE.
Figure 3-22. S12XE System RAM in the Memory Map
0x7F_FFFF
0x00_0000
0x13_FFFF
0x0F_FFFF
EEPROM Area
0x00_07FF
0x3F_FFFF
RAM Area in the Memory Map
FLASH Area
RAMSIZE
REG. Area
External
Space Area
Unimplemented
RAM
RAM Area
16K RAM
8K RAM
Unimplemented
RAM
8K RAM
0x0F_FFFF
0x0F_FFFF
0x0F_C000
0x0F_A000
0x0F_E000
0x00_0800
0x00_0800
ROMHM = 1 RAMHM = 0
ROMHM = 0 RAMHM = X ROMHM = 1 RAMHM = 1