Datasheet

Chapter 4 Memory Protection Unit (S12XMPUV1)
MC9S12XE-Family Reference Manual Rev. 1.25
230 Freescale Semiconductor
4.3.1
Register Descriptions
This section describes in address order all the MPU module registers and their individual bits.
Figure 4-2. MPU Register Summary
Register
Name
Bit 7 6 5 4 3 2 1 Bit 0
0x0000
MPUFLG
R
AEF
WPF NEXF 0 0 0 0 SVSF
W
0x0001
MPUASTAT0
R 0 ADDR[22:16]
W
0x0002
MPUASTAT1
R ADDR[15:8]
W
0x0003
MPUASTAT2
R ADDR[7:0]
W
0x0004
Reserved
R00000000
W
0x0005
MPUSEL
R
SVSEN
0000
SEL[2:0]
W
0x0006
MPUDESC0
(1)
1. The module addresses 0x0006−0x000B represent a window in the register map through which different descriptor registers
are visible.
R
MSTR0 MSTR1 MSTR2 MSTR3 LOW_ADDR[22:19]
W
0x0007
MPUDESC1
1
R
LOW_ADDR[18:11]
W
0x0008
MPUDESC2
1
R
LOW_ADDR[10:3]
W
0x0009
MPUDESC3
1
R
WP NEX
00
HIGH_ADDR[22:19]
W
0x000A
MPUDESC4
1
R
HIGH_ADDR[18:11]
W
0x000B
MPUDESC5
1
R
HIGH_ADDR[10:3]
W
= Unimplemented or Reserved