Datasheet

Chapter 4 Memory Protection Unit (S12XMPUV1)
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor 235
Table 4-9. MPUDESC1 Field Descriptions
4.3.1.8 MPU Descriptor Register 2 (MPUDESC2)
Figure 4-10. MPU Descriptor Register 2 (MPUDESC2)
Read: Anytime
Write: Anytime
Table 4-10. MPUDESC2 Field Descriptions
4.3.1.9 MPU Descriptor Register 3 (MPUDESC3)
Figure 4-11. MPU Descriptor Register 3 (MPUDESC3)
Read: Anytime
Write: Anytime
Table 4-11. MPUDESC3 Field Descriptions
Field Description
7–0
LOW_ADDR[
18:11]
Memory range lower boundary address bits — The LOW_ADDR[18:11] bits represent bits [18:11] of the
global memory address that is used as the lower boundary for the described memory range.
Address: Module Base + 0x0008
76543210
R
LOW_ADDR[10:3]
W
Reset 0 0 0 00000
Field Description
7–0
LOW_ADDR[
10:3]
Memory range lower boundary address bits — The LOW_ADDR[10:3] bits represent bits [10:3] of the global
memory address that is used as the lower boundary for the described memory range.
Address: Module Base + 0x0009
76543210
R
WP NEX
00
HIGH_ADDR[22:19]
W
Reset 0 0 0 01111
Field Description
7
WP
Write-Protect bit — The WP bit causes the described memory range to be treated as write-protected. If this
bit is set every attempt to write in the described memory range causes an access violation.