Datasheet

Chapter 5 External Bus Interface (S12XEBIV4)
MC9S12XE-Family Reference Manual Rev. 1.25
242 Freescale Semiconductor
5.1.1 Glossary or Terms
5.1.2 Features
The XEBI includes the following features:
• Output of up to 23-bit address bus and control signals to be used with a non-muxed external bus
• Bidirectional 16-bit external data bus with option to disable upper half
• Visibility of internal bus activity
5.1.3 Modes of Operation
• Single-chip modes
The external bus interface is not available in these modes.
• Expanded modes
Address, data, and control signals are activated on the external bus in normal expanded mode and
special test mode.
• Emulation modes
The external bus is activated to interface to an external tool for emulation of normal expanded mode
or normal single-chip mode applications.
bus clock System Clock. Refer to CRG Block Guide.
expanded modes
Normal Expanded Mode
Emulation Single-Chip Mode
Emulation Expanded Mode
Special Test Mode
single-chip modes
Normal Single-Chip Mode
Special Single-Chip Mode
emulation modes
Emulation Single-Chip Mode
Emulation Expanded Mode
normal modes
Normal Single-Chip Mode
Normal Expanded Mode
special modes
Special Single-Chip Mode
Special Test Mode
NS Normal Single-Chip Mode
SS Special Single-Chip Mode
NX Normal Expanded Mode
ES Emulation Single-Chip Mode
EX Emulation Expanded Mode
ST Special Test Mode
external resource Addresses outside MCU
PRR Port Replacement Registers
PRU Port Replacement Unit
EMULMEM External emulation memory
access source CPU or BDM or XGATE