Datasheet

Chapter 7 Background Debug Module (S12XBDMV2)
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor 283
7.3.2.1 BDM Status Register (BDMSTS)
Figure 7-3. BDM Status Register (BDMSTS)
0x7FFF07 BDMCCRH R 0 0 0 0 0
CCR10 CCR9 CCR8
W
0x7FFF08 BDMGPR R
BGAE BGP6 BGP5 BGP4 BGP3 BGP2 BGP1 BGP0
W
0x7FFF09 Reserved R 0 0 0 0 0 0 0 0
W
0x7FFF0A Reserved R 0 0 0 0 0 0 0 0
W
0x7FFF0B Reserved R 0 0 0 0 0 0 0 0
W
Register Global Address 0x7FFF01
7 6 543 2 1 0
R
ENBDM
BDMACT 0SDVTRACE
CLKSW
UNSEC 0
W
Reset
Special Single-Chip Mode 0
(1)
1. ENBDM is read as 1 by a debugging environment in special single chip mode when the device is not secured or secured but
fully erased (non-volatile memory). This is because the ENBDM bit is set by the standard firmware before a BDM command
can be fully transmitted and executed.
1 000 0 0
(3)
3. UNSEC is read as 1 by a debugging environment in special single chip mode when the device is secured and fully erased,
else it is 0 and can only be read if not secure (see also bit description).
0
Emulation Modes
(if modes available)
1 0 000 1
(2)
2. CLKSW is read as 1 by a debugging environment in emulation modes when the device is not secured and read as 0 when
secured if emulation modes available.
0 0
All Other Modes 0 0 000 0 0 0
= Unimplemented, Reserved = Implemented (do not alter)
0 = Always read zero
Global
Address
Register
Name
Bit 7 6 5 4 3 2 1 Bit 0
= Unimplemented, Reserved = Implemented (do not alter)
X
= Indeterminate
0
= Always read zero
Figure 7-2. BDM Register Summary (continued)