Datasheet

Chapter 1 Device Overview MC9S12XE-Family
MC9S12XE-Family Reference Manual Rev. 1.25
34 Freescale Semiconductor
NOTE
Reserved register space shown in Table 1-1 is not allocated to any module.
This register space is reserved for future use. Writing to these locations have
no effect. Read access to these locations returns zero.
1.1.5 Address Mapping
Figure 1-2 shows S12XE CPU & BDM local address translation to the global memory map. It indicates
also the location of the internal resources in the memory map.
EEEPROM size is presented like a fixed 256 KByte in the memory map.
0x0200–0x023F CAN3 64
0x0240–0x027F PIM (port integration module) 64
0x0280–0x02BF CAN4 64
0x02C0–0x02EF ATD0 (analog-to-digital converter 12 bit 16-channel) 48
0x02F0–0x02F7 Voltage regulator 8
0x02F8–0x02FF Reserved 8
0x0300–0x0327 PWM (pulse-width modulator 8 channels) 40
0x0328–0x032F Reserved 8
0x0330–0x0337 SCI6 (serial communications interface) 8
0x0338–0x033F SCI7 (serial communications interface) 8
0x0340–0x0367 PIT (periodic interrupt timer) 40
0x0368–0x037F PIM (port integration module) 24
0x0380–0x03BF XGATE 64
0x03C0–0x03CF Reserved 16
0x03D0–0x03FF TIM (timer module) 48
0x0400–0x07FF Reserved 1024
Table 1-1. Device Register Memory Map (continued)
Address Module
Size
(Bytes)