Datasheet

Chapter 10 XGATE (S12XGATEV3)
MC9S12XE-Family Reference Manual Rev. 1.25
364 Freescale Semiconductor
10.3.1.6 XGATE Initial Stack Pointer for Interrupt Priorities 3 to 1 (XGISP31)
The XGISP31 register is intended to point to the stack region that is used by XGATE channels of priority
3 to 1. Every time a thread of such priority is started, RISC core register R7 will be initialized with the
content of XGISP31.
Read: Anytime
Write: Only if XGATE requests are disabled (XGE = 0) and idle (XGCHID = $00))
10.3.1.7 XGATE Vector Base Address Register (XGVBR)
The Vector Base Address Register (Figure 10-9) determines the location of the XGATE vector block (see
Section Figure 10-23., “XGATE Vector Block).
Read: Anytime
Write: Only if XGATE requests are disabled (XGE = 0) and idle (XGCHID = $00))
Table 10-7. XGISP74 Field Descriptions
Field Description
15–1
XBISP74[15:1]
Initial Stack Pointer— The XGISP74 register holds the initial value of RISC core register R7, for threads of
priority 7 to 4.
Module Base +0x0006
1514131211109876543210
R
XGISP31[15:1]
0
W
Reset 0000000000000000
= Unimplemented or Reserved
Figure 10-8. XGATE Initial Stack Pointer for Interrupt Priorities 3 to 1 (XGISP31)
Table 10-8. XGISP31 Field Descriptions
Field Description
15–1
XBISP31[15:1]
Initial Stack Pointer— The XGISP31 register holds the initial value of RISC core register R7, for threads of
priority 3 to 1.
Module Base +0x0006
1514131211109876543210
R
XGVBR[15:1]
0
W
Reset 1111111000000000
= Unimplemented or Reserved
Figure 10-9. XGATE Vector Base Address Register (XGVBR)