Datasheet

Chapter 10 XGATE (S12XGATEV3)
MC9S12XE-Family Reference Manual Rev. 1.25
448 Freescale Semiconductor
Operation
The result in RD is the 16 bit sign extended representation of the original two’s complement number in the
low byte of RD.L.
CCR Effects
Code and CPU Cycles
SEX
Sign Extend Byte to Word
SEX
NZVC
∆∆0—
N: Set if bit 15 of the result is set; cleared otherwise.
Z: Set if the result is $0000; cleared otherwise.
V: 0; cleared.
C: Not affected.
Source Form
Address
Mode
Machine Code Cycles
SEX RD MON 0 0 0 0 0 RD 1 1 1 1 0 1 0 0 P