Datasheet

Chapter 10 XGATE (S12XGATEV3)
MC9S12XE-Family Reference Manual Rev. 1.25
462 Freescale Semiconductor
Branches
BCC REL9 0 0 1 0 0 0 0 REL9
BCS REL9 0 0 1 0 0 0 1 REL9
BNE REL9 0 0 1 0 0 1 0 REL9
BEQ REL9 0 0 1 0 0 1 1 REL9
BPL REL9 0 0 1 0 1 0 0 REL9
BMI REL9 0 0 1 0 1 0 1 REL9
BVC REL9 0 0 1 0 1 1 0 REL9
BVS REL9 0 0 1 0 1 1 1 REL9
BHI REL9 0 0 1 1 0 0 0 REL9
BLS REL9 0 0 1 1 0 0 1 REL9
BGE REL9 0 0 1 1 0 1 0 REL9
BLT REL9 0 0 1 1 0 1 1 REL9
BGT REL9 0 0 1 1 1 0 0 REL9
BLE REL9 0 0 1 1 1 0 1 REL9
BRA REL10 0 0 1 1 1 1 REL10
Load and Store Instructions
LDB RD, (RB, #OFFS5) 0 1 0 0 0 RD RB OFFS5
LDW RD, (RB, #OFFS5) 0 1 0 0 1 RD RB OFFS5
STB RS, (RB, #OFFS5) 0 1 0 1 0 RS RB OFFS5
STW RS, (RB, #OFFS5) 0 1 0 1 1 RS RB OFFS5
LDB RD, (RB, RI) 0 1 1 0 0 RD RB RI 0 0
LDW RD, (RB, RI) 0 1 1 0 1 RD RB RI 0 0
STB RS, (RB, RI) 0 1 1 1 0 RS RB RI 0 0
STW RS, (RB, RI) 0 1 1 1 1 RS RB RI 0 0
LDB RD, (RB, RI+) 0 1 1 0 0 RD RB RI 0 1
LDW RD, (RB, RI+) 0 1 1 0 1 RD RB RI 0 1
STB RS, (RB, RI+) 0 1 1 1 0 RS RB RI 0 1
STW RS, (RB, RI+) 0 1 1 1 1 RS RB RI 0 1
LDB RD, (RB, –RI) 0 1 1 0 0 RD RB RI 1 0
LDW RD, (RB, –RI) 0 1 1 0 1 RD RB RI 1 0
STB RS, (RB, –RI) 0 1 1 1 0 RS RB RI 1 0
STW RS, (RB, –RI) 0 1 1 1 1 RS RB RI 1 0
Bit Field Instructions
BFEXT RD, RS1, RS2 0 1 1 0 0 RD RS1 RS2 1 1
BFINS RD, RS1, RS2 0 1 1 0 1 RD RS1 RS2 1 1
BFINSI RD, RS1, RS2 0 1 1 1 0 RD RS1 RS2 1 1
BFINSX RD, RS1, RS2 0 1 1 1 1 RD RS1 RS2 1 1
Logic Immediate Instructions
ANDL RD, #IMM8 1 0 0 0 0 RD IMM8
ANDH RD, #IMM8 1 0 0 0 1 RD IMM8
BITL RD, #IMM8 1 0 0 1 0 RD IMM8
BITH RD, #IMM8 1 0 0 1 1 RD IMM8
ORL RD, #IMM8 1 0 1 0 0 RD IMM8
ORH RD, #IMM8 1 0 1 0 1 RD IMM8
XNORL RD, #IMM8 1 0 1 1 0 RD IMM8
XNORH RD, #IMM8 1 0 1 1 1 RD IMM8
Table 10-24. Instruction Set Summary (Sheet 2 of 3)
Functionality 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0