Datasheet

Chapter 13 Analog-to-Digital Converter (ADC12B16CV1)
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor 517
13.3.2.7 ATD Status Register 0 (ATDSTAT0)
This register contains the Sequence Complete Flag, overrun flags for external trigger and FIFO mode, and
the conversion counter.
Read: Anytime
Table 13-16. Analog Input Channel Select Coding
SC CD CC CB CA
Analog Input
Channel
00000 AN0
0001 AN1
0010 AN2
0011 AN3
0100 AN4
0101 AN5
0110 AN6
0111 AN7
1000 AN8
1001 AN9
1 0 1 0 AN10
1 0 1 1 AN11
1 1 0 0 AN12
1 1 0 1 AN13
1 1 1 0 AN14
1 1 1 1 AN15
1 0 0 0 0 Reserved
0 0 0 1 Reserved
0 0 1 X Reserved
0100 V
RH
0101 V
RL
0110 (V
RH
+V
RL
) / 2
0 1 1 1 Reserved
1 X X X Reserved
Module Base + 0x0006
76543210
R
SCF
0
ETORF FIFOR
CC3 CC2 CC1 CC0
W
Reset 0 0 0 00000
= Unimplemented or Reserved
Figure 13-9. ATD Status Register 0 (ATDSTAT0)