Datasheet

Chapter 14 Enhanced Capture Timer (ECT16B8CV3)
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor 571
Figure 14-71. 8-Bit Pulse Accumulators Block Diagram
P0
Load Holding Register and Reset Pulse Accumulator
0
0
EDG3
EDG2
EDG1
EDG0
Edge Detector Delay Counter
Interrupt
Interrupt
P1
Edge Detector Delay Counter
P2
Edge Detector Delay Counter
P3
Edge Detector Delay Counter
PA0H Holding
0
8-Bit PAC1 (PACN1)
0
8-Bit PAC2 (PACN2)
PA2H Holding
0
8-Bit PAC3 (PACN3)
PA3H Holding
8-Bit PAC0 (PACN0)
8, 12,16, ..., 1024
8, 12,16, ..., 1024
8, 12,16, ..., 1024
8, 12,16, ..., 1024
Register
PA1H Holding
Register
Register
Register