Datasheet

Chapter 1 Device Overview MC9S12XE-Family
MC9S12XE-Family Reference Manual Rev. 1.25
60 Freescale Semiconductor
PK[6:4] ADDR
[22:20]
ACC[2:0] — — V
DDX
PUCR Up Port K I/O, extended
addresses, access source
for external access
PK[3:0] ADDR
[19:16]
IQSTAT
[3:0]
——V
DDX
PUCR Up Extended address, PIPE
status
PL7 TXD7 — — — V
DDX
PERL/
PPSL
Up Port L I/O, TXD of SCI7
PL6 RXD7 — — — V
DDX
PERL/
PPSL
Up Port LI/O, RXD of SCI7
PL5 TXD6 — — — V
DDX
PERL/
PPSL
Up Port L I/O, TXD of SCI6
PL4 RXD6 — — — V
DDX
PERL/
PPSL
Up Port LI/O, RXD of SCI6
PL3 TXD5 — — — V
DDX
PERL/
PPSL
Up Port L I/O, TXD of SCI5
PL2 RXD5 — — — V
DDX
PERL/
PPSL
Up Port LI/O, RXD of SCI5
PL1 TXD4 — — — V
DDX
PERL/
PPSL
Up Port L I/O, TXD of SCI4
PL0 RXD4 — — — V
DDX
PERL/
PPSL
Up Port LI/O, RXD of SCI4
PM7 TXCAN3 TXD3 TXCAN4 — V
DDX
PERM/
PPSM
Disabled Port M I/O, TX of CAN3 and
CAN4, TXD of SCI3
PM6 RXCAN3 RXD3 RXCAN4 — V
DDX
PERM/PPSM Disabled Port M I/O RX of CAN3 and
CAN4, RXD of SCI3
PM5 TXCAN2 TXCAN0 TXCAN4 SCK0 V
DDX
PERM/PPSM Disabled Port M I/OCAN0, CAN2,
CAN4, SCK of SPI0
PM4 RXCAN2 RXCAN0 RXCAN4 MOSI0 V
DDX
PERM/PPSM Disabled Port M I/O, CAN0, CAN2,
CAN4, MOSI of SPI0
PM3 TXCAN1 TXCAN0
SS0 — V
DDX
PERM/PPSM Disabled Port M I/O TX of CAN1,
CAN0,
SS of SPI0
PM2 RXCAN1 RXCAN0 MISO0 — V
DDX
PERM/PPSM Disabled Port M I/O, RX of CAN1,
CAN0, MISO of SPI0
PM1 TXCAN0 — — V
DDX
PERM/PPSM Disabled Port M I/O, TX of CAN0
PM0 RXCAN0 — — V
DDX
PERM/PPSM Disabled Port M I/O, RX of CAN0
PP7 KWP7 PWM7 SCK2 TIMIOC7 V
DDX
PERP/
PPSP
Disabled Port P I/O, interrupt, channel
7 of PWM/TIM , SCK of SPI2
PP6 KWP6 PWM6
SS2 TIMIOC6 V
DDX
PERP/
PPSP
Disabled Port P I/O, interrupt, channel
6 of PWM/TIM,
SS of SPI2
PP5 KWP5 PWM5 MOSI2 TIMIOC5 V
DDX
PERP/
PPSP
Disabled Port P I/O, interrupt, channel
5 of PWM/TIM, MOSI of
SPI2
Table 1-10. Signal Properties Summary (Sheet 3 of 4)
Pin
Name
Function 1
Pin
Name
Function 2
Pin
Name
Function 3
Pin
Name
Function 4
Pin
Name
Function 5
Power
Supply
Internal Pull
Resistor
Description
CTRL
Reset
State