Datasheet

Chapter 18 Periodic Interrupt Timer (S12PIT24B4CV2)
MC9S12XE-Family Reference Manual Rev. 1.25
690 Freescale Semiconductor
modify-write instruction which writes back the “bit-wise or” of the flag_register and the mask into the
flag_register. BSET would clear all flag bits that were set, independent from the mask.
For example, to clear flag bit 0 use: MOVB #$01,PITTF.
18.6 Application Information
To get started quickly with the PIT24B4C module this section provides a small code example how to use
the block. Please note that the example provided is only one specific case out of the possible configurations
and implementations.
Functionality: Generate an PIT interrupt on channel 0 every 500 PIT clock cycles.
ORG CODESTART ; place the program into specific
; range (to be selected)
LDS RAMEND ; load stack pointer to top of RAM
MOVW #CH0_ISR,VEC_PIT_CH0 ; Change value of channel 0 ISR adr
; ******************** Start PIT Initialization *******************************************************
CLR PITCFLMT ; disable PIT
MOVB #$01,PITCE ; enable timer channel 0
CLR PITMUX ; ch0 connected to micro timer 0
MOVB #$63,PITMTLD0 ; micro time base 0 equals 100 clock cycles
MOVW #$0004,PITLD0 ; time base 0 eq. 5 micro time bases 0 =5*100 = 500
MOVB #$01,PITINTE ; enable interupt channel 0
MOVB #$80,PITCFLMT ; enable PIT
CLI ; clear Interupt disable Mask bit
;******************** Main Program *************************************************************
MAIN: BRA * ; loop until interrupt
;******************** Channel 0 Interupt Routine ***************************************************
CH0_ISR: LDAA PITTF ; 8 bit read of PIT time out flags
MOVB #$01,PITTF ; clear PIT channel 0 time out flag
RTI ; return to MAIN