Datasheet

Chapter 1 Device Overview MC9S12XE-Family
MC9S12XE-Family Reference Manual Rev. 1.25
74 Freescale Semiconductor
VDDPLL 1.8 V Provides operating voltage and ground for
the phased-locked loop. This allows the
supply voltage to the PLL to be bypassed
independently. Internal power and ground
generated by internal regulator.
VSSPLL 0 V
Table 1-11. Power and Ground Connection Summary (continued)
Mnemonic
Nominal
Voltage
Description