Datasheet
Chapter 1 Device Overview MC9S12XE-Family
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor 29
— No external components required
— Configurable option to spread spectrum for reduced EMC radiation (frequency modulation)
• CRG (clock and reset generation)
— COP watchdog
— Real time interrupt
— Clock monitor
— Fast wake up from STOP in self clock mode
• Memory Options
— 128K, 256k, 384K, 512K, 768K and 1M byte Flash
— 2K, 4K byte emulated EEPROM
— 12K, 16K, 24K, 32K, 48K and 64K Byte RAM
• Flash General Features
— 64 data bits plus 8 syndrome ECC (Error Correction Code) bits allow single bit failure
correction and double fault detection
— Erase sector size 1024 bytes
— Automated program and erase algorithm
• D-Flash Features
— Up to 32 Kbytes of D-Flash memory with 256 byte sectors for user access.
— Dedicated commands to control access to the D-Flash memory over EEE operation.
— Single bit fault correction and double bit fault detection within a word during read operations.
— Automated program and erase algorithm with verify and generation of ECC parity bits.
— Fast sector erase and word program operation.
— Ability to program up to four words in a burst sequence
• Emulated EEPROM Features
— Automatic EEE file handling using an internal Memory Controller.
— Automatic transfer of valid EEE data from D-Flash memory to buffer RAM on reset.
— Ability to monitor the number of outstanding EEE related buffer RAM words left to be
programmed into D-Flash memory.
— Ability to disable EEE operation and allow priority access to the D-Flash memory.
— Ability to cancel all pending EEE operations and allow priority access to the D-Flash memory.
• Two 16-channel, 12-bit Analog-to-Digital Converters
— 8/10/12 Bit resolution
—3µs, 10-bit single conversion time
— Left/right, signed/unsigned result data
— External and internal conversion trigger capability
— Internal oscillator for conversion in Stop modes
— Wake from low power modes on analog comparison > or <= match
• Five MSCAN (1 M bit per second, CAN 2.0 A, B software compatible modules)
— Five receive and three transmit buffers