Datasheet

Port Integration Module (S12XSPIMV1)
S12XS Family Reference Manual, Rev. 1.13
104 Freescale Semiconductor
2.3.43 Port P Input Register (PTIP)
1
PTP
Port P general purpose input/output data—Data Register, PWM output, routed TIM output, pin interrupt
input/output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The PWM function takes precedence over the TIM and general purpose I/O function if the related channel is
enabled.
• The TIM function takes precedence over the general purpose I/O function if the related channel is enabled.
• Pin interrupts can be generated if enabled in input or output mode.
0
PTP
Port P general purpose input/output data—Data Register, PWM output, routed TIM output, routed SCI1 RXD
output, pin interrupt input/output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The PWM function takes precedence over the TIM, SCI1 and general purpose I/O function if the related channel
is enabled.
• The TIM function takes precedence over SCI1 and the general purpose I/O function if the related channel is
enabled.
• The SCI1 function takes precedence over the general purpose I/O function if enabled.
• Pin interrupts can be generated if enabled in input or output mode.
Address 0x0259 Access: User read
1
1
Read: Anytime
Write:Never, writes to this register have no effect
76543210
R PTIP7 PTIP6 PTIP5 PTIP4 PTIP3 PTIP2 PTIP1 PTIP0
W
Reset uuuuuuuu
= Unimplemented or Reserved u = Unaffected by reset
Figure 2-41. Port P Input Register (PTIP)
Table 2-40. PTIP Register Field Descriptions
Field Description
7-0
PTIP
Port P input data—
A read always returns the buffered input state of the associated pin. It can be used to detect overload or short circuit
conditions on output pins.
Table 2-39. PTP Register Field Descriptions (continued)
Field Description