Datasheet

Port Integration Module (S12XSPIMV1)
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor 107
2.3.47 Port P Polarity Select Register (PPSP)
2.3.48 Port P Interrupt Enable Register (PIEP)
Address 0x025D Access: User read/write
1
1
Read: Anytime
Write: Anytime
76543210
R
PPSP7 PPSP6 PPSP5 PPSP4 PPSP3 PPSP2 PPSP1 PPSP0
W
Reset 00000000
Figure 2-45. Port P Polarity Select Register (PPSP)
Table 2-44. PPSP Register Field Descriptions
Field Description
7-0
PPSP
Port P pull device select—Configure pull device and pin interrupt edge polarity on input pin
This bit selects a pull-up or a pull-down device if enabled on the associated port input pin.
This bit also selects the polarity of the active pin interrupt edge.
1 A pull-down device selected; rising edge selected
0 A pull-up device selected; falling edge selected
Address 0x025E Access: User read/write
1
1
Read: Anytime
Write: Anytime
76543210
R
PIEP7 PIEP6 PIEP5 PIEP4 PIEP3 PIEP2 PIEP1 PIEP0
W
Reset 00000000
Figure 2-46. Port P Interrupt Enable Register (PIEP)
Table 2-45. PIEP Register Field Descriptions
Field Description
7-0
PIEP
Port P interrupt enable—
This bit enables or disables on the edge sensitive pin interrupt on the associated pin.
1 Interrupt enabled
0 Interrupt disabled (interrupt flag masked)