Datasheet

Port Integration Module (S12XSPIMV1)
S12XS Family Reference Manual, Rev. 1.13
120 Freescale Semiconductor
2.3.73 Port AD0 Pull Up Enable Register 1 (PER1AD0)
2.3.74 PIM Reserved Registers
2.4 Functional Description
2.4.1 General
Each pin except PE0, PE1, and BKGD can act as general purpose I/O. In addition each pin can act as an
output or input of a peripheral module.
Address 0x0277 Access: User read/write
1
1
Read: Anytime
Write: Anytime
76543210
R
PER1AD07 PER1AD06 PER1AD05 PER1AD04 PER1AD03 PER1AD02 PER1AD01 PER1AD00
W
Reset 00000000
Figure 2-71. Port AD0 Pull Up Enable Register 1 (PER1AD0)
Table 2-70. PER1AD0 Register Field Descriptions
Field Description
7-0
PER1AD0
Port AD0 pull device enable—Enable pull-up device on input pin
This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
no effect. The polarity is selected by the related polarity select register bit.
1 Pull device enabled
0 Pull device disabled
Address 0x0278-0x27F Access: User read
1
1
Read: Always reads 0x00
Write: Unimplemented
76543210
R00000000
W
Reset 00000000
= Unimplemented or Reserved u = Unaffected by reset
Figure 2-72. PIM Reserved Registers