Datasheet

Memory Mapping Control (S12XMMCV4)
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor 135
3.3.2.4 MMC Control Register (MMCCTL1)
Read: Anytime. .
Write: Refer to each bit description.
3.3.2.5 Program Page Index Register (PPAGE)
Read: Anytime
Address: 0x0013 PRR
76543210
R
MGRAMON
0
DFIFRON PGMIFRON
0000
W
Reset 00000000
= Unimplemented or Reserved
Figure 3-10. MMC Control Register (MMCCTL1)
Table 3-6. MMCCTL1 Field Descriptions
Field Description
7
MGRAMON
Flash Memory Controller SCRATCH RAM visible in the global memory map
Write: Anytime
This bit is used to made the Flash Memory Controller SCRATCH RAM visible in the global memory map.
0 Not visible in the global memory map.
1 Visible in the global memory map.
5
DFIFRON
Data Flash Information Row (IFR) visible in the global memory map
Write: Anytime
This bit is used to made the IFR sector of the Data Flash visible in the global memory map.
0 Not visible in the global memory map.
1 Visible in the global memory map.
4
PGMIFRON
Program Flash Information Row (IFR) visible in the global memory map
Write: Anytime
This bit is used to map the IFR sector of the Program Flash to address range 0x40_000-0x40_3FFF of the global
memory map.
0 Not visible in the global memory map.
1 Visible in the global memory map.
Address: 0x0015
76543210
R
PIX7 PIX6 PIX5 PIX4 PIX3 PIX2 PIX1 PIX0
W
Reset 11111110
Figure 3-11. Program Page Index Register (PPAGE)