Datasheet

Periodic Interrupt Timer (S12PIT24B4CV1)

S12XS Family Reference Manual, Rev. 1.13

Freescale Semiconductor 359

12.3.0.9 PIT Count Register 0 to 3 (PITCNT0–3)

Read: Anytime

Write: Has no meaning or effect

Module Base + 0x000A, 0x000B

15 14 13 12 11 109876543210

PCNT

Reset 0000000000000000

Figure 12-15. PIT Count Register 0 (PITCNT0)

Module Base + 0x000E, 0x000F

15 14 13 12 11 109876543210

PCNT

Reset 0000000000000000

Figure 12-16. PIT Count Register 1 (PITCNT1)

Module Base + 0x0012, 0x0013

15 14 13 12 11 109876543210

PCNT

Reset 0000000000000000

Figure 12-17. PIT Count Register 2 (PITCNT2)

Module Base + 0x0016, 0x0017

15 14 13 12 11 109876543210

PCNT

Reset 0000000000000000

Figure 12-18. PIT Count Register 3 (PITCNT3)

Table 12-10. PITCNT0–3 Field Descriptions

Field Description

15:0

PCNT[15:0]

PIT Count Bits 15-0 — These bits represent the current 16-bit modulus down-counter value. The read access

for the count register must take place in one clock cycle as a 16-bit access.