Datasheet

S12XS Family Reference Manual, Rev. 1.13
36 Freescale Semiconductor
Device Overview S12XS Family
36 24 20 PE7 XCLKS ECLKX2 — — V
DDX
PUCR Up Port E I/O, system clock
output, clock select
input
37 25 - PE6 — — — — V
DDX
While RESET pin
is low: down
2
Port E I/O
38 26 - PE5 — — — — V
DDX
While RESET pin
is low: down
2
Port E I/O
39 27 21 PE4 ECLK — — — V
DDX
PUCR Up Port E I/O, bus clock
output
40 28 22 VSSX2 — — — — — — — —
41 29 23 VDDX2 — — — — — — — —
42 30 24
RESET — — — — V
DDX
PULLUP External reset
43 31 25 VDDR — — — — — — — —
44 32 26 VSS3 — — — — — — — —
45 33 27 VSSPLL — — — — — — — —
46 34 28 EXTAL — — — — V
DDPLL
NA NA Oscillator pin
47 35 29 XTAL — — — — V
DDPLL
NA NA Oscillator pin
48 36 30 VDDPLL — — — — — — — —
49 - - PH3 KWH3 — — — V
DDX
PERH/PPSH Disabled Port H I/O, interrupt
50 - - PH2 KWH2 — — — V
DDX
PERH/PPSH Disabled Port H I/O, interrupt
51 - - PH1 KWH1 — — — V
DDX
PERH/PPSH Disabled Port H I/O, interrupt
52 - - PH0 KWH0 — — — V
DDX
PERH/PPSH Disabled Port H I/O, interrupt
53 37 - PE3 — — — — V
DDX
PUCR Up Port E I/O
54 38 - PE2 — — — — V
DDX
PUCR Up Port E I/O
Table 1-6. Pin-Out Summary
1
(continued)
Package Terminal Function
Power
Supply
Internal Pull
Resistor
Description
LQFP
112
QFP
80
LQFP
64
Pin
2nd
Func.
3rd
Func.
4th
Func.
5th
Func.
CTRL
Reset
State