Datasheet

Device Overview S12XS Family
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor 39
87 - - PM7 — — — — V
DDX
PERM/PPSM Disabled Port M I/O
88 - - PM6 — — — — V
DDX
PERM/PPSM Disabled Port M I/O
89 63 50 PS0 RXD0 — — — V
DDX
PERS/PPSS Up Port S I/O, RXD of SCI0
90 64 51 PS1 TXD0 — — — V
DDX
PERS/PPSS Up Port S I/O, TXD of SCI0
91 65 52 PS2 RXD1 — — — V
DDX
PERS/PPSS Up Port S I/O, RXD of SCI1
92 66 53 PS3 TXD1 — — — V
DDX
PERS/PPSS Up Port S I/O, TXD of SCI1
93 - - PS4 MISO0 — — — V
DDX
PERS/PPSS Up Port S I/O, MISO of SPI0
94 - - PS5 MOSI0 — — — V
DDX
PERS/PPSS Up Port S I/O, MOSI of SPI0
95 - - PS6 SCK0 — — — V
DDX
PERS/PPSS Up Port S I/O, SCK of SPI0
96 - - PS7
SS0 — — — V
DDX
PERS/PPSS Up Port S I/O, SS of SPI0
97 67 54 TEST — — — — N.A.
RESET pin DOWN Test input
98 68 - PJ7 KWJ7 — — — V
DDX
PERJ/PPSJ Up Port J I/O, interrupt
99 69 - PJ6 KWJ6 — — — V
DDX
PERJ/PPSJ Up Port J I/O, interrupt
100 70 55 PM5 SCK0 — — — V
DDX
PERM/PPSM Disabled Port M I/O, SCK of SPI0
101 71 56 PM4 MOSI0 — — — V
DDX
PERM/PPSM Disabled Port M I/O, MOSI of
SPI0
102 72 57 PM3
SS0 — — — V
DDX
PERM/PPSM Disabled Port M I/O, SS of SPI0
103 73 58 PM2 MISO0 — — — V
DDX
PERM/PPSM Disabled Port M I/O, MISO of
SPI0
104 74 59 PM1 TXCAN0 TXD1 — — V
DDX
PERM/PPSM Disabled Port M I/O, TX of CAN0,
TXD of SCI1
105 75 60 PM0 RXCAN0 RXD1 — — V
DDX
PERM/PPSM Disabled Port M I/O, RX of CAN0,
RXD of SCI1
Table 1-6. Pin-Out Summary
1
(continued)
Package Terminal Function
Power
Supply
Internal Pull
Resistor
Description
LQFP
112
QFP
80
LQFP
64
Pin
2nd
Func.
3rd
Func.
4th
Func.
5th
Func.
CTRL
Reset
State