Datasheet

Device Overview S12XS Family
S12XS Family Reference Manual, Rev. 1.13
47 Freescale Semiconductor
VDDPLL 1.8 V Provides operating voltage and ground for
the phased-locked loop. This allows the
supply voltage to the PLL to be bypassed
independently. Internal power and ground
generated by internal regulator.
VSSPLL 0 V
Table 1-7. Power and Ground Connection Summary
Mnemonic
Nominal
Voltage
Description