Datasheet

Voltage Regulator (S12VREGL3V3V1)
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor 501
17.3.2.6 Reserved 06
The Reserved 06 is reserved for test purposes.
17.3.2.7 High Temperature Trimming Register (VREGHTTR)
The VREGHTTR register allows to trim the VREG temperature sense.
Fiption
Table 17-12. Trimming Effect
0x02F6
76543210
R00000000
W
Reset 0 0 0 00000
= Unimplemented or Reserved
Figure 17-7. Reserved 06
0x02F7
76543210
R
HTOEN
000
HTTR3 HTTR2 HTTR1 HTTR0
W
Reset 0 0 0 0 0
1
0
1
0
1
0
1
1. Reset value is either 0 or preset by factory. See Section 1 (Device Overview) for details.
= Unimplemented or Reserved
Figure 17-8. VREGHTTR
Table 17-11. VREGHTTR field descriptions
Field Description
7
HTOEN
High Temperature Offset Enable Bit — If set the temperature sense offset is enabled
0 The temperature sense offset is disabled
1 The temperature sense offset is enabled
3–0
HTTR[3:0]
High Temperature Trimming Bits — See Table 23-16 for trimming effects.
Bit Trimming Effect
HTTR[3] Increases V
HT
twice of HTTR[2]
HTTR[2] Increases V
HT
twice of HTTR[1]
HTTR[1] Increases V
HT
twice of HTTR[0]
HTTR[0] Increases V
HT
(to compensate Temperature Offset)