Datasheet

Device Overview S12XS Family
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor 53
1.6.3 Effects of Reset
When a reset occurs, MCU registers and control bits are initialized. Refer to the respective block sections
for register reset states.
On each reset, the Flash module executes a reset sequence to load Flash configuration registers.
Vector base + $BA FLASH Fault Detect I bit FCNFG2 (SFDIE, DFDIE) No No
Vector base + $B8 FLASH I bit FCNFG (CCIE) No Yes
Vector base + $B6 CAN0 wake-up I bit CAN0RIER (WUPIE) Yes Yes
Vector base + $B4 CAN0 errors I bit CAN0RIER (CSCIE,
OVRIE)
No Yes
Vector base + $B2 CAN0 receive I bit CAN0RIER (RXFIE) No Yes
Vector base + $B0 CAN0 transmit I bit CAN0TIER (TXEIE[2:0]) No Yes
Vector base + $AE
to
Vector base + $90
Reserved
Vector base + $8E Port P Interrupt I bit PIEP (PIEP7-PIEP0) Yes Yes
Vector base+ $8C PWM emergency shutdown I bit PWMSDN (PWMIE) No Yes
Vector base + $8A
to
Vector base + $82
Reserved
Vector base + $80 Low-voltage interrupt (LVI) I bit VREGCTRL (LVIE) No Yes
Vector base + $7E Autonomous periodical interrupt (API) I bit VREGAPICTRL (APIE) Yes Yes
Vector base + $7C High Temperature Interrupt (HTI) I bit VREGHTCL (HTIE) No Yes
Vector base + $7A Periodic interrupt timer channel 0 I bit PITINTE (PINTE0) No Yes
Vector base + $78 Periodic interrupt timer channel 1 I bit PITINTE (PINTE1) No Yes
Vector base + $76 Periodic interrupt timer channel 2 I bit PITINTE (PINTE2) No Yes
Vector base + $74 Periodic interrupt timer channel 3 I bit PITINTE (PINTE3) No Yes
Vector base + $72
to
Vector base + $40
Reserved
Vector base + $3E ATD0 Compare Interrupt I bit ATD0CTL2 (ACMPIE) Yes Yes
Vector base + $3C
to
Vector base + $14
Reserved
Vector base + $12 System Call Interrupt (SYS) — None — —
Vector base + $10 Spurious interrupt — None — —
1
16 bits vector address based
Table 1-10. Interrupt Vector Locations (Sheet 2 of 2)
Vector Address
1
Interrupt Source
CCR
Mask
Local Enable
STOP
Wake up
WAIT
Wake up