Datasheet

Port Integration Module (S12XSPIMV1)
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor 61
NOTE
If there is more than one function associated with a pin, the priority is
indicated by the position in the table from top (highest priority) to bottom
(lowest priority)
Table 2-1. Pin Functions and Priorities
Port Pin Name
Pin Function
& Priority
1
I/O Description
Pin Function
after Reset
- BKGD MODC
2
I MODC input during RESET BKGD
BKGD I/O S12X_BDM communication pin
A PA[7:0] GPIO I/O General purpose GPIO
B PB[7:0] GPIO I/O General purpose GPIO
E PE[7] XCLKS
2
I External clock selection input during RESET GPIO
ECLKX2 O Free-running clock at core clock rate (ECLK x 2)
GPIO I/O General purpose
PE[6:5] GPIO I/O General purpose
PE[4] ECLK O Free-running clock at bus clock rate or programmable
down-scaled bus clock
GPIO I/O General purpose
PE[3:2] GPIO I/O General purpose
PE[1]
IRQ I Maskable level- or falling edge-sensitive interrupt
GPI I General-purpose
PE[0] XIRQ I Non-maskable level-sensitive interrupt
GPI I General-purpose
K PK[7,5:0] GPIO I/O General purpose GPIO