Datasheet

Port Integration Module (S12XSPIMV1)
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor 65
2.3.1 Memory Map
Table 2-2 shows the register map of the Port Integration Module.
Table 2-2. Block Memory Map
Port
Offset or
Address
Register Access Reset Value Section/Page
A
B
0x0000 PORTA—Port A Data Register R/W 0x00 2.3.3/2-75
0x0001 PORTB—Port B Data Register R/W 0x00 2.3.4/2-75
0x0002 DDRA—Port A Data Direction Register R/W 0x00 2.3.5/2-76
0x0003 DDRB—Port B Data Direction Register R/W 0x00 2.3.6/2-76
0x0004
:
0x0007
PIM Reserved R 0x00 2.3.7/2-77
E 0x0008 PORTE—Port E Data Register R/W
1
0x00 2.3.8/2-77
0x0009 DDRE—Port E Data Direction Register R/W
1
0x00 2.3.9/2-78
0x000A
:
0x000B
Non-PIM address range
2
- - -
A
B
E
K
0x000C PUCR—Pull-up Control Register R/W
1
0xD0 2.3.10/2-79
0x000D RDRIV—Reduced Drive Register R/W
1
0x00 2.3.11/2-80
0x000E
:
0x001B
Non-PIM address range
2
- - -
E 0x001C ECLKCTL—ECLK Control Register R/W
1
0b
3
100_0000 2.3.12/2-81
0x001D PIM Reserved R 0x00 2.3.13/2-82
0x001E IRQCR—IRQ Control Register R/W
1
0x40 2.3.14/2-83
0x001F PIM Reserved R 0x00 2.3.15/2-83
0x0020
:
0x0031
Non-PIM address range
2
- - -
K 0x0032 PORTK—Port K Data Register R/W 0x00 2.3.16/2-84
0x0033 DDRK—Port K Data Direction Register R/W 0x00 2.3.17/2-84
0x0034
:
0x023F
Non-PIM address range
2
- - -