Datasheet

Detailed Register Address Map
S12XS Family Reference Manual, Rev. 1.13
720 Freescale Semiconductor
0x00D5 SCI1SR2
R
AMAP
00
TXPOL RXPOL BRK13 TXDIR
RAF
W
0x00D6 SCI1DRH
RR8
T8
000000
W
0x00D7 SCI1DRL
RR7R6R5R4R3R2R1R0
WT7T6T5T4T3T2T1T0
1
Those registers are accessible if the AMAP bit in the SCI1SR2 register is set to zero
2
Those registers are accessible if the AMAP bit in the SCI1SR2 register is set to one
0x00D8–0x00DF Serial Peripheral Interface (SPI0) Map
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0x00D8 SPI0CR1
R
SPIE SPE SPTIE MSTR CPOL CPHA SSOE LSBFE
W
0x00D9 SPI0CR2
R0
XFRW
0
MODFEN BIDIROE
0
SPISWAI SPC0
W
0x00DA SPI0BR
R0
SPPR2 SPPR1 SPPR0
0
SPR2 SPR1 SPR0
W
0x00DB SPI0SR
R SPIF 0 SPTEF MODF 0 0 0 0
W
0x00DC SPI0DRH
R R15 R14 R13 R12 R11 R10 R9 R8
W T15 T14 T13 T12 T11 T10 T9 T8
0x00DD SPI0DRL
RR7R6R5R4R3R2R1R0
WT7T6T5T4T3T2T1T0
0x00DE Reserved
R00000000
W
0x00DF Reserved
R00000000
W
0x00E0–0x00FF Reserved Register Space
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0x00E0-
0x00FF
Reserved
R00000000
W
0x0100–0x0113 NVM Control Register (FTMR) Map
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0x0100 FCLKDIV
R FDIVLD
FDIV6 FDIV5 FDIV4 FDIV3 FDIV2 FDIV1 FDIV0
W
0x0101 FSEC
R KEYEN1 KEYEN0 RNV5 RNV4 RNV3 RNV2 SEC1 SEC0
W
0x0102 FCCOBIX
R0 0 0 0 0
CCOBIX2 CCOBIX1 CCOBIX0
W
0x0103 FECCRIX
R0 0 0 0 0
ECCRIX2 ECCRIX1 ECCRIX0
W
0x00D0–0x00D7 Asynchronous Serial Interface (SCI1) Map (continued)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0